1. Field of the Invention
The disclosures herein generally relate to image forming apparatuses for rendering print data, and particularly relate to an image forming apparatus and an image processing method for which a rendering range can be modified.
2. Description of the Related Art
Conventional embedded devices often employ a single core CPU. Due to increasing use of multi-core CPUs such as dual-core CPUs or quad-core CPUs for general-purpose personal computers, there are also an increasing number of embedded devices which employ multi-core CPUs. Study has been underway to adopt a multi-core structure in a printer.
A printer adopting a multi-core structure can perform a plurality of processes in parallel, thereby increasing processing speed. Printers generally perform two processes, i.e., a DL generation process for generating intermediate date (i.e., display list) from PDL (page description language) data and a rendering process for rendering the intermediate data. A plurality of cores may perform rendering in parallel to increase the speed of printing process (see Japanese Patent Application Publication No. 2006-092125, for example).
The above-noted patent document discloses an image processing apparatus in which a plurality of image processing processors, although different from a multi-core structure, perform rendering within respective rendering blocks which together constitute one page.
In the image processing apparatus disclosed in the above-noted patent document, however, a block division unit monitors the operating status of each image processing processor. Upon finding an image processing processor in an idle state, the block division unit allocates a rendering block to this image processing processor. This arrangement gives rise to a problem in that the load statuses of processes need to be constantly monitored.
Accordingly, it may be desirable to provide an image forming apparatus, an information processing method, and a non-transitory recording medium having a program embodied therein that can dynamically allocate a rendering block to a rendering unit without monitoring the rendering unit.